Presently, evaluation of the interconnect capacitance might take parasitic effects and requires a technique capable of handling complicated test equipment. To the contrary, quasi DC measurement structures provide several methods of evaluating the interconnect capacitance at a narrow test area. A floating gate capacitance measurement method is one of the methods. [C. Kortekaas, “on-chip Quasi-static Floating-gate capacitance Measurement Method”, Proc. IEEE Int. Conf. ON Microelectronic Test Structures, pp. 109-113, Vol 3, March 1990]
FIG. 1 is an equivalent circuit diagram of a floating gate structure. The floating gate structure includes one MOSFET M and two first and second capacitors Cr and Cm. The first capacitor Cr is a reference capacitance, and the second capacitor Cm is a capacitance to be measured. For example, the MOSFET M (P-channel MOSFET) can be a sense transistor, and can have a drain connected to the ground and a source and a bulk set to the same potential. This construction can prevent variation in the threshold voltage, which is caused by the potential between the source and the bulk. Further, the first capacitor Cr has one end connected to voltage Vf, and the second capacitor Cm is connected to a ground gnd.
In the prior art, the capacitance measurement method is performed by measuring a voltage Vs depending on the voltage Vf while constantly supplying current to the MOSFET M in a saturation region (−Vds>−Vgs+Vt). Of course, in the case of an N-channel MOSFET, a voltage −Vs depending on a voltage −Vf can be measured while constantly supplying current to the MOSFET in a saturation region (Vds>Vgs+Vt).
In this case, the voltage Vs connected to the source of the MOSFET M varies as much as variation in the voltage at the floating gate due to a source-follower characteristic. Consequently, in the Vf-Vs relationship graph, the slope between Vf-Vs depends on the first capacitor Cr and the second capacitor Cm:Vs=S*Vf+Vo(I),  Equation 1
where S=Cr/(Cr+Cm), and Vo(I) indicates the voltage of the source node when current of 1 ampere is applied to the MOSFET when Vf is 0 Volts.
The capacitance of the second capacitor Cm, which will be measured according to Equation 1 and a slope formula, can be expressed as Cm=(1−S)/S*Cr.
However, when employing the source-flower characteristic of the MOSFET, a charge effect at the floating gate node, which is caused by the gate-to-drain overlap capacitance depending on variation in the voltage between the drain and the floating gate node, is not taken into consideration. That is, the influence of the overlap capacitance between the gate and the drain is not taken into consideration. Accordingly, a measured capacitance could be erroneous, in that, it has an error caused by the gate-to-drain overlap capacitance.